Error correction codes (ECC) are used in a variety of systems, including in data storage and communications. While older ECC decoder designs have a fixed processing latency, newer ECC designs, such as iterative low density parity check (LDPC) decoders, iterative Reed Solomon (RS) decoders, and other iterative ECC decoders, may have a variable latency which may cause a long delay. There is therefore a need for improved decoder implementations to handle or reduce the impact of such delay.